1. Field of the Invention
The present invention relates to a semiconductor device including a field-effect transistor using a salicide (self-aligned silicide) structure and a method of fabricating the same.
2. Description of the Background Art
A transistor using a salicide structure is a structure most often used as a method of reducing the parasitic resistance on a contact junction or gate electrode (e.g., Jpn. Pat. Appln. KOKAI Publication No. 11-8387).
A salicide structure is as follows. As shown in FIG. 1, after a gate electrode 101 is formed, an insulating film such as an oxide film which does not react with a silicide material is left behind as a gate sidewall film 102 on the side surface of the gate electrode 101. On this structure, a metal film for forming a silicide is formed. The silicon and metal are caused to react with each other by heat, thereby forming silicide films 104 in self-alignment on exposed source/drain regions 103.
Recently, the advance of the scaling (downsizing) of devices makes it necessary to shallow contact junctions (to form shallow junctions). However, it is difficult to scale the silicide reaction layer itself, and this is one cause which interferes with the scaling of source/drain regions. Especially in portions of an element region (active region) near the edges of an element isolation region 105 using STI (Shallow Trench Isolation), it is difficult to control ion implantation or diffusion to the same depth as a flat portion separated from the edges. This deteriorates the margin to a junction leak on the junction surfaces between the source/drain regions 103 and a semiconductor substrate 106 when a salicide structure is formed.